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Si570/Si571
Rev. 0.31
25
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.2
Updated " Description" on page 1.
Updated "1. Detailed Block Diagrams" on page 4 for
both XO and VCXO.
Updated the Nominal Control Voltage in Table 2, “VC
Control Voltage Input,” on page 5.
Updated tables to reflect slight performance
differences between Si570 and Si571.
Added detail to the "3.2. Frequency Programming
Details" on page 12.
Revised "3.2.3. Programming Procedure" on page
12.
Procedure now requires use of two frequency
configuration register sets.
Procedure now recommends disabling output at
powerup to protect equipment not expecting the
default output frequency.
Added second frequency configuration register set
to the register tables.
Added frequency configuration select register.
Updated "7. Ordering Information" on page 21 to be
consistent with the Si55x series devices.
Revision 0.2 to Revision 0.3
Updated Table 1, “Recommended Operating
Conditions,” on page 5.
Device maintains stable operation over –40 to +85 C
operating temperature range.
Supply current specifications updated.
Updated Table 4, “CLK± Output Levels and
Symmetry,” on page 7.
Updated LVDS differential peak-peak swing
specifications.
Updated Table 5, “CLK± Output Phase Jitter
(Si570),” on page 7.
Updated Table 6, “CLK± Output Phase Jitter
(Si571),” on page 8.
Updated Table 7, “CLK± Output Period Jitter,” on
page 9.
Revised period jitter specifications.
Updated Table 10, “Absolute Maximum Ratings,” on
page 10 to reflect the soldering temperature time at
260 C is 20–40 sec per JEDEC J-STD-020C.
Updated device programming procedure in Section
"3.2.3. Programming Procedure" on page 12.
Updated "7. Ordering Information" on page 21.
Changed ordering instructions to revision D.
Added "8. Si57x Mark Specification" on page 22.
Revision 0.3 to Revision 0.31
Updated "3.2.3. Programming Procedure" on page
12.
Corrected Step 6 to read “bit 4”.
Corrected Freeze DCO bit location in Register 137 to
bit 4 on pages 14 and 18.
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相关代理商/技术参数
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